Creating a Formal Verification Platform for IBM CoreConnect-based SoC
نویسنده
چکیده
How to ensure functionality correctness in an SoC chip is a troublesome issue. This is because SoC is so complex that it is difficult to find errors in corner cases. Thus, bugs may exist even after thorough simulation and emulation. In contrast, formal verification provides 100% coverage with counterexamples and is expected to be a complementary solution. Hence, many researchers and designers are trying to apply formal verification to SoC design in order to find errors as early as possible. The current status-quo is that there are only isolated tools, but no integrated environment for the formal verification of VLSI designs. Here, a Formal Verification Platform (FVP) is proposed, which allows designers to configure a formal verification environment representing the SoC in which a user-designed Intellectual Property (IP) is to be integrated. We illustrate how to create a formal verification platform for an IBM CoreConnectbased SoC in this work.
منابع مشابه
Formal Verification of an IBM CoreConnectTM Processor Local Bus Arbiter Core
This paper describes the model checking e ort for an arbiter core for the IBM CoreConnect Architecture. We present our veri cation methodology and describe how it was in uenced by the architecture. We also present and analyze the bugs found and discuss the di culties associated with verifying complex on-chip buses, highlighting the need for better tools and methodologies for their speci cation ...
متن کاملSimplifying SoC design with the Customizable Control Processor Platform
With the circuit density available in today’s ASIC design systems, increased integration is possible creating more complexity in the design of a System on a Chip (SoC). IBM’s Customizable Control Processor (CCP) [1,2] addresses the new challenges facing design engineers by identifying the common features required in most SoC designs, and creating a hardened platform that can be used as a starti...
متن کاملSpace Codesign: A SystemC Framework for Fast Exploration of Hardware/Software Systems
Electronic System Level has brought new abstractions for designing systems, which most designers are not familiar with. The Space CodesignTM SystemC design framework allows designers to easily model hardware/software-based systems, starting from a high level model and refining down to the chip. We propose a rapid system prototyping toolset that permits co-monitoring of specifications, effortles...
متن کاملUsing FPGA Prototyping Board as an SoC Verification and Integration Platform
Size of new designs has grown so much that it easily allows creation of the entire system containing microprocessor unit and peripherals on one chip. Verification of such designs can no longer rely on software only, since simulation of MPU does not allow fast enough testing of application software and formal tools handle system hardware only. The use of FPGA-based prototyping boards creates fas...
متن کاملAnalysis of Verification Methodologies Based on a SoC Platform Design
In a SoC (system-on-chip) design, a design complexity is a big bottleneck. In order to overcome the design complexity, platform based design method is widely adopted for designers. Most complex SoCs need a heterogeneous design development environment for hardware and software co-design. In this paper, we discuss about some kinds of verification approaches with platform based design methodology ...
متن کامل